Toshiba announces 96 layer 3D flash memory

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Toshiba, today announced that it has developed a prototype sample of 96-layer BiCS 3D flash memory with a stacked structure, with 3-bit-per-cell (triple-level cell, TLC) technology. Samples of the new 96-layer product, which is a 256 gigabit (32GB) device, are scheduled for release in the second half of 2017 and mass production is targeted for 2018.