Still loads of nonsense on the net about intel QPI and DMI!

There’s tons of senseless discussions and questions and wrong facts on the net about intel QPI and DMI. Here is some nonsense you can find over an over again:

  • “Is QPI only temporary?” :doh:
  • “Lynnfield has QPI! It’s only on die.” :doh: :doh:
  • “intel is moving back from QPI to DMI.” :doh: :doh: :doh:

OK, it’s sooooooo simple:

QPI is used to connect high volume data transfer between two CPUs or between a CPU and a “northbridge”.

The DMI link is a lower data volume transfer connection used to connect a “southbridge” to a “northbridge” or a “southbridge” to a CPU that has all “northbridge” functionalities integrated (memory controller plus PCIE controller).

This means:

intel CAN’T(!) move back to DMI, because such a statement doesn’t make any sense:

Bloomfield still has 50% of the northbridge functionalities (the PCIE controllers) left off on a northbridge (the X58 IOH). Therefore it still needs to connect to a “northbridge”. Naturally it does so through a QPI bus.

Lynnfield has and all Sandy Bridges (as it seemes so far) will have all northbridge functionalities integrated. Therefore they only need to connect to a southbridge (the P55, P67 and X68 PCHs). Naturally they do so through a DMI bus.

And:

QPI is a technology to interconnect DIES. There is NO(!) QPI on the Lynnfield die! The integrated connection to the on-die PCIE controller is not QPI but some internal high-bandwidth connection technology.

So:

QPI isn’t temporary either! It’s possible that it’s a temporary issue to use QPI on desktop systems to connect to the X58 IOH, since even the X68 will need to be just a PCH it seems. But QPI will always be the bus that connects the CPUs of multi-CPU systems!

Are these little things so hard to get?? :wink: :slight_smile: