Samsung 64GB CF Card

(11, Sep, 2006 / SEC)

SAMSUNG Announces First 40-nanometer Device – 32 Gb NAND Flash with Revolutionary Charge Trap Technology

Seoul,Korea - September 11, 2006: Samsung Electronics Co., Ltd., the world leader in advanced semiconductor technology solutions, today announced that it has developed the industry’s first 40-nanometer (nm) memory device. The new 32 Gigabit (Gb) NAND flash device is the first memory to incorporate a Charge Trap Flash (CTF) architecture, a revolutionary new approach to further increase manufacturing efficiency while greatly improving performance.

The new CTF-based NAND flash memory increases the reliability of the memory by sharply reducing inter-cell noise levels. Its surprisingly simple structure also enables higher scalability which will eventually improve manufacturing process technology from 40 nm to 30 and even 20nm.

In each 32Gb device, the control gate in the CTF is only 20 percent as large as a conventional control gate in a typical floating gate structure. With CTF, there is no floating gate. Instead, the data is temporarily placed in a “holding chamber” of the non-conductive layer of the flash memory composed of silicon nitride (SiN). This results in a higher level of reliability and better control of the storage current.

The 32Gb NAND flash memory can be used in memory cards with densities of up to 64-Gigabytes (GBs). One 64GB card can store over 64 hours of DVD resolution movies (40 movies) or 16,000 MP3 music files (1,340 hours).

The CTF design is enabled through the use of a TANOS structure comprised of tantalum (metal), aluminum oxide (high k material), nitride, oxide and silicon. The use of a TANOS structure marks the first application of a metal layer coupled with a high k material to the NAND device.

The TANOS CTF architecture, which serves as the foundation of the 40nm 32Gb CTF NAND flash announced today, was developed after extensive research of the Samsung Semiconductor R&D department. Samsung first revealed the TANOS structure through a paper at the 2003 International Electron Devices Meeting (IEDM).
The new 32Gb CTF memory was announced at the sixth annual Samsung press conference in Seoul.

Introduction of a 40nm manufacturing process for 32Gb NAND flash marks the seventh generation of NAND flash that follows the New Memory Growth Theory of double-density growth every 12 months, which was first presented by Dr. Chang Gyu Hwang, president and CEO of Samsung Electronics’ Semiconductor Business in a keynote address at ISSCC 2002.

About Samsung Electronics
Samsung Electronics Co., Ltd. is a global leader in semiconductor, telecommunication, digital media and digital convergence technologies with 2005 parent company sales of US$56.7 billion and net income of US$7.5 billion. Employing approximately 128,000 people in over 120 offices in 57 countries, the company consists of five main business units: Digital Appliance Business, Digital Media Business, LCD Business, Semiconductor Business and Telecommunication Network Business. Recognized as one of the fastest growing global brands, Samsung Electronics is a leading producer of digital TVs, memory chips, mobile phones, and TFT-LCDs.
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The next step - Industry takes aim at 450mm
Chris Hall,, Taipei [Monday 11 September 2006]

The semiconductor industry faces challenges without end, and one of the major issues looming on the horizon is the move to 450 millimeters, and all the questions and challenges that involves.

When the issue was recently broached with Archie Hwang, who became chairman of SEMI in June, Hwang emphasized that production platforms within the fabs would have to change, and change dramatically, if they are going to handle the relatively huge size of 450mm. Concerning the R&D costs, Hwang indicated that there’s a tendency these days for the equipment makers themselves to have to bear a proportion of those costs.

Charles Kau, president of DRAM maker Inotera, pointed out that the industry may split on the 450mm issue, between those bigger players that wish to scale up on a faster schedule, and suppliers who don’t want to make the move too fast. The big players will aim to increase revenues and profits by transitioning to larger wafers. For smaller companies, it will be a question of survival, since many of them will hardly be able to afford the cost of transition. The danger there is that suppliers of materials and equipment may lose their customers.

The semiconductor industry scales up wafer sizes every 12 to 15 years on average. In the past, such transitions were always accompanied by a decreased number of companies that could afford the manufacturing costs at the new level. For example, while over 100 companies worldwide produced 200mm wafers, only about 50, perhaps even less, were able to move ahead to production on 300mm wafers. Approximating a similar trend going to the next phase, which will be the transition to 450mm wafers, it is easy to understand why suppliers are already worried about the future, Kau explained.

Intel, for one, has already indicated that 450mm wafer production is now on its technology development roadmap, with the chip giant claiming that the migration will be inevitable, regardless of the vast investment costs involved.

Ajit Manocha, vice president of NXP (previously known as Philips Semiconductors), has also stated that the transition to 450mm wafer production is inevitable, but he also warned that the migration will disrupt the entire semiconductor environment. He estimated that there will be 10 450mm wafer fabs by 2015, with only a limited number of big names, such as Intel and Samsung Electronics, demanding the migration.

Brian J. Shields, vice president of worldwide wafer fabrication for Micron Technology, commented that Micron is closely watching any movement on the issue, but the technology is not mature enough for Micron to make any form of commitment at this stage. He further noted that any process or tool migration involves both risk and capex—most likely in large doses of both—before any revenue will be realized. The shift to 300mm wafer fabrication has reinforced the importance, for the supplier base, of adhering to an industry standard, and this should provide some guidelines for the industry when it heads into next-generation wafer production, Shields added.

SEMI is approaching the issue by forming a productivity workforce, a body made up of industry representatives who will study various models and scenarios and figure out just how a successful migration to 450mm could be achieved and what the benefits might be. Inevitably, it will be a very complex model, says Hwang; a lot of parameters have to be taken into account.

Any number of questions can arise at 450mm, says Hwang. For example, do you want a flexible, “agile” production model, or something more along the lines of traditional mass production? Would you want a single-wafer approach, or would batch be the order of the day?

The International Technology Roadmap for Semiconductors (ITRS), in the meantime, has assessed that 450mm wafer fabrication will come online in 2012, while VLSI Research believes the earliest time for introducing 450mm wafer production will be 2020-2025.

Hwang himself thinks the majority voice within SEMI today wants to push out any transition to 450mm for a few more years. He recognizes that many in the industry have only just completed their 300mm investment, and they are looking for a return. Even so, SEMI is already defining the 450mm issues and listening carefully to what all of its members have to say.

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